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[X86][Btver2] Add support for multiple pipelines stages for fpu schedules. NFCI.
authorSimon Pilgrim <llvm-dev@redking.me.uk>
Wed, 14 Mar 2018 23:12:09 +0000 (23:12 +0000)
committerSimon Pilgrim <llvm-dev@redking.me.uk>
Wed, 14 Mar 2018 23:12:09 +0000 (23:12 +0000)
commit48fbf0c69a256024c19cf3dfb1f17ab570661973
tree766f36cb43043ca0530cdb67989fc15f4f966ce9tree | snapshot
parent8f2e86da36269ec23bb22ef93b82e76e5d22166acommit | diff
[X86][Btver2] Add support for multiple pipelines stages for fpu schedules. NFCI.

This allows us to use JWriteResFpuPair for complex schedule classes as well as single pipe instructions.

llvm-svn: 327588
llvm/lib/Target/X86/X86ScheduleBtVer2.td diff | blob | history
Domain: System / Toolchain;