drm/i915: Make 308 and 671 MHz cdclks more accurate on SKL
authorVille Syrjälä <ville.syrjala@linux.intel.com>
Fri, 13 May 2016 20:41:31 +0000 (23:41 +0300)
committerVille Syrjälä <ville.syrjala@linux.intel.com>
Mon, 23 May 2016 18:11:14 +0000 (21:11 +0300)
commit487ed2e4e9d62363ddd5fab2407100d3436fd0c9
treed006640de37f8e0cb91493116cb8c0ce854a6e4a
parent70c2c184065e642642b563ae36ff3db682a5eee0
drm/i915: Make 308 and 671 MHz cdclks more accurate on SKL

The SKL 308.57 MHz cdclk is probably 8640/28 = ~308.571 Mhz.
Similartly the 617.14 MHz cdclk is probably 8640/14 = ~617.143 MHz.
Let's use the slightly more accurate numbers. Potentially we might
change to computing all of these based on dividers, but let's
stick to the current theme for now..

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1463172100-24715-13-git-send-email-ville.syrjala@linux.intel.com
Reviewed-by: Imre Deak <imre.deak@intel.com>
drivers/gpu/drm/i915/intel_display.c