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(parent: 7d92b78) | patch
PowerPC: Optimized isnan/isnanf for POWER8
authorAdhemerval Zanella <azanella@linux.vnet.ibm.com>
Thu, 27 Feb 2014 15:43:51 +0000 (09:43 -0600)
committerAdhemerval Zanella <azanella@linux.vnet.ibm.com>
Thu, 27 Feb 2014 18:58:32 +0000 (12:58 -0600)
commit487972aea52004f604c2878c8c9d3e77670f2c32
tree1f8a570e52975d04c513523e7d7b454a29015993tree | snapshot
parent7d92b78723848ae616709eb8f0191ea067025b18commit | diff
PowerPC: Optimized isnan/isnanf for POWER8

This patch add a optimized isnan/isnanf implementation for POWER8
using the new Move From VSR Doubleword instruction to gains some
cycles from FP to GRP register move.
ChangeLog diff | blob | history
sysdeps/powerpc/powerpc32/power4/multiarch/init-arch.h diff | blob | history
sysdeps/powerpc/powerpc64/fpu/multiarch/Makefile diff | blob | history
sysdeps/powerpc/powerpc64/fpu/multiarch/s_isnan-power8.S [new file with mode: 0644] blob
sysdeps/powerpc/powerpc64/fpu/multiarch/s_isnan.c diff | blob | history
sysdeps/powerpc/powerpc64/fpu/multiarch/s_isnanf.c diff | blob | history
sysdeps/powerpc/powerpc64/power8/fpu/s_isnan.S [new file with mode: 0644] blob
sysdeps/powerpc/powerpc64/power8/fpu/s_isnanf.S [new file with mode: 0644] blob
Domain: System / Toolchain;