ARM: AM43xx: EMIF: configure self-refresh entry delay
authorDave Gerlach <d-gerlach@ti.com>
Tue, 18 Feb 2014 12:31:59 +0000 (07:31 -0500)
committerTom Rini <trini@ti.com>
Tue, 4 Mar 2014 14:42:07 +0000 (09:42 -0500)
commit4800be4a0c0058fd1670576ec0872980f3ed78f5
tree5f025d4db9398565de230a989a42e8d7ea7fd967
parent3a3939bf3d216900486748ffc330a33d565c242b
ARM: AM43xx: EMIF: configure self-refresh entry delay

Per a suggestion from the hardware team, program the emif_pwr_mgmt_ctrl
and emif_pwr_mgmt_ctrl_shdw registers within the EMIF to hold the
desired delay in cycles that the EMIF waits without an access to enter
self-refresh, in this case 8192 cycles. With this, code desiring to
enter self refresh only has to toggle one bit to enable it.

Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
arch/arm/cpu/armv7/am33xx/ddr.c