drm/i915: Mark CPU cache as dirty when used for rendering
authorChris Wilson <chris@chris-wilson.co.uk>
Mon, 7 Nov 2016 16:52:04 +0000 (16:52 +0000)
committerJani Nikula <jani.nikula@intel.com>
Fri, 11 Nov 2016 08:04:30 +0000 (10:04 +0200)
commit48004881f6935704e5e4ffaf9e0ec921a25db243
tree498510392de60652f29eb54f8fc4c3aef7053c24
parent54905ab5fe7aa453610e31cec640e528aaedb2e2
drm/i915: Mark CPU cache as dirty when used for rendering

On LLC, or even snooped, machines rendering via the GPU ends up in the CPU
cache. This cacheline dirt also needs to be flushed to main memory when
moving to an incoherent domain, such as the display's scanout engine.
Mostly, this happens because either the object is marked as dirty from
its first use or is avoided by setting the object into the display
domain from the start.

v2: Treat WT as not requiring a clflush prior to use on the display
engine as well.

Fixes: 0f71979ab7fb ("drm/i915: Performed deferred clflush inside set-cache-level")
References: https://bugs.freedesktop.org/show_bug.cgi?id=95414
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Jani Nikula <jani.nikula@linux.intel.com>
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Cc: <stable@vger.kernel.org> # v4.0+
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/20161107165204.7008-1-chris@chris-wilson.co.uk
(cherry picked from commit 7aa6ca61ee5546d74b76610894924cdb0d4a1af0)
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
drivers/gpu/drm/i915/i915_gem_execbuffer.c