[RISCV] Fix 64-bit data layout mismatch between backend and target description
authorMandeep Singh Grang <mgrang@codeaurora.org>
Thu, 16 Nov 2017 20:30:49 +0000 (20:30 +0000)
committerMandeep Singh Grang <mgrang@codeaurora.org>
Thu, 16 Nov 2017 20:30:49 +0000 (20:30 +0000)
commit47fbc5911dca29ca64eb8d3500d382dde7921975
treee4fed454824aafa2fd6dd733ab817b5f357c9b82
parentdc3c9eb0cffba68fcf6ce487618f381c962f7531
[RISCV] Fix 64-bit data layout mismatch between backend and target description

Reviewers: asb

Reviewed By: asb

Subscribers: rbar, johnrusso, simoncook, jordy.potman.lists, llvm-commits

Differential Revision: https://reviews.llvm.org/D40145

llvm-svn: 318454
llvm/lib/Target/RISCV/RISCVTargetMachine.cpp