mlxsw: reg: Increase trap identifier to 10 bits
authorAmit Cohen <amitc@mellanox.com>
Tue, 14 Jul 2020 14:21:02 +0000 (17:21 +0300)
committerDavid S. Miller <davem@davemloft.net>
Tue, 14 Jul 2020 21:50:49 +0000 (14:50 -0700)
commit47e4b1620e804cf3b45523b0023400df330ea25c
tree1a1ec7d88b8d63a259170dfd4b9ebc05d49fe6c3
parent4039504e6a0c1abdbbabb4693e5e251c55009f21
mlxsw: reg: Increase trap identifier to 10 bits

The trap identifier was increased to 10 bits in new versions of the
Programmer's Reference Manual (PRM).

Increase it accordingly in the Host PacKet Trap (HPKT) register and in
the Completion Queue Element (CQE).

This is significant for subsequent patches that will introduce trap
identifiers which utilize the extended range.

Signed-off-by: Amit Cohen <amitc@mellanox.com>
Reviewed-by: Jiri Pirko <jiri@mellanox.com>
Signed-off-by: Petr Machata <petrm@mellanox.com>
Signed-off-by: Ido Schimmel <idosch@mellanox.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
drivers/net/ethernet/mellanox/mlxsw/pci_hw.h
drivers/net/ethernet/mellanox/mlxsw/reg.h
drivers/net/ethernet/mellanox/mlxsw/trap.h