projects / contrib / beignet.git / commit
? search:
summary | shortlog | log | commit | commitdiff | tree
(parent: 7b0ca17) | patch
GBE: fix one double related bugs for post register scheduling.
authorZhigang Gong <zhigang.gong@intel.com>
Tue, 11 Nov 2014 10:09:58 +0000 (18:09 +0800)
committerZhigang Gong <zhigang.gong@intel.com>
Wed, 12 Nov 2014 04:10:06 +0000 (12:10 +0800)
commit47ba7dd6736b83e93327b4403aa06fb0dcf1c3cd
treefe40c8227f9831628027d273513078baa6ea763dtree | snapshot
parent7b0ca17ba8bebb1984db772f03c59c74b49fbc3acommit | diff
GBE: fix one double related bugs for post register scheduling.

We need to set the temporary register to U64 type, otherwise
latter post register scheduling will do some bad things.

Although we don't support double currently, this bug still could
be triggerred easily if you use printf("%f", foo).

Signed-off-by: Zhigang Gong <zhigang.gong@intel.com>
Reviewed-by: "Song, Ruiling" <ruiling.song@intel.com>
backend/src/backend/gen75_encoder.cpp diff | blob | history
backend/src/backend/gen8_encoder.cpp diff | blob | history
backend/src/backend/gen_encoder.cpp diff | blob | history
backend/src/backend/gen_insn_selection.cpp diff | blob | history
Domain: SCM / Uncategorized;