Revert "iommu/arm-smmu-v3: Decrease the queue size of evtq and priq"
authorZhou Wang <wangzhou1@hisilicon.com>
Tue, 7 Dec 2021 06:32:48 +0000 (14:32 +0800)
committerWill Deacon <will@kernel.org>
Wed, 15 Dec 2021 10:14:06 +0000 (10:14 +0000)
commit477436699e7801276fa7306e20318156cb535249
treeab9ab4db3a33551670af33bbb309849117f04325
parenta556cfe4cabc6d79cbb7733f118bbb420b376fe6
Revert "iommu/arm-smmu-v3: Decrease the queue size of evtq and priq"

The commit f115f3c0d5d8 ("iommu/arm-smmu-v3: Decrease the queue size of
evtq and priq") decreases evtq and priq, which may lead evtq/priq to be
full with fault events, e.g HiSilicon ZIP/SEC/HPRE have maximum 1024 queues
in one device, every queue could be binded with one process and trigger a
fault event. So let's revert f115f3c0d5d8.

In fact, if an implementation of SMMU really does not need so long evtq
and priq, value of IDR1_EVTQS and IDR1_PRIQS can be set to proper ones.

Signed-off-by: Zhou Wang <wangzhou1@hisilicon.com>
Acked-by: Zhen Lei <thunder.leizhen@huawei.com>
Link: https://lore.kernel.org/r/1638858768-9971-1-git-send-email-wangzhou1@hisilicon.com
Signed-off-by: Will Deacon <will@kernel.org>
drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h