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(parent: 7b63c56) | patch
clk: xgene: Add SoC and PMD PLL clocks with v2 hardware
authorLoc Ho <lho@apm.com>
Wed, 20 Jan 2016 02:27:42 +0000 (19:27 -0700)
committerStephen Boyd <sboyd@codeaurora.org>
Fri, 29 Jan 2016 20:54:35 +0000 (12:54 -0800)
commit47727beb26569725f6c200cde2c38bd1e9f6f1b0
tree408a5ba5f1835574520da37ab233d374a6c5a0e3tree | snapshot
parent7b63c567b5b3b3e366e6555d764318a75073f2c7commit | diff
clk: xgene: Add SoC and PMD PLL clocks with v2 hardware

Add X-Gene SoC and PMD PLL clocks support for v2 hardware.
X-Gene SoC v2 and above use an slightly different SoC
and PMD PLL hardware logic.

Signed-off-by: Loc Ho <lho@apm.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
drivers/clk/clk-xgene.c diff | blob | history
Domain: System / Kernel;