RFC: Uniformity Analysis for Irreducible Control Flow
authorSameer Sahasrabuddhe <sameer.sahasrabuddhe@amd.com>
Tue, 20 Dec 2022 01:19:30 +0000 (06:49 +0530)
committerSameer Sahasrabuddhe <sameer.sahasrabuddhe@amd.com>
Tue, 20 Dec 2022 01:52:24 +0000 (07:22 +0530)
commit475ce4c200ca640f1d6ccd097b167a04f009cb18
tree744cdb5ac33c41fd548ce7d6d3abcfc2efb08230
parent3ebc6bee6b23f163f4977836bd50bc952449836b
RFC: Uniformity Analysis for Irreducible Control Flow

Uniformity analysis is a generalization of divergence analysis to
include irreducible control flow:

  1. The proposed spec presents a notion of "maximal convergence" that
     captures the existing convention of converging threads at the
     headers of natual loops.

  2. Maximal convergence is then extended to irreducible cycles. The
     identity of irreducible cycles is determined by the choices made
     in a depth-first traversal of the control flow graph. Uniformity
     analysis uses criteria that depend only on closed paths and not
     cycles, to determine maximal convergence. This makes it a
     conservative analysis that is independent of the effect of DFS on
     CycleInfo.

  3. The analysis is implemented as a template that can be
     instantiated for both LLVM IR and Machine IR.

Validation:
  - passes existing tests for divergence analysis
  - passes new tests with irreducible control flow
  - passes equivalent tests in MIR and GMIR

Based on concepts originally outlined by
Nicolai Haehnle <nicolai.haehnle@amd.com>

With contributions from Ruiling Song <ruiling.song@amd.com> and
Jay Foad <jay.foad@amd.com>.

Support for GMIR and lit tests for GMIR/MIR added by
Yashwant Singh <yashwant.singh@amd.com>.

Differential Revision: https://reviews.llvm.org/D130746
81 files changed:
llvm/docs/ConvergenceAndUniformity.rst [new file with mode: 0644]
llvm/docs/CycleTerminology.rst
llvm/docs/Reference.rst
llvm/docs/convergence-both-diverged-nested.png [new file with mode: 0755]
llvm/docs/convergence-closed-path.png [new file with mode: 0755]
llvm/docs/convergence-divergent-inside.png [new file with mode: 0755]
llvm/docs/convergence-divergent-outside.png [new file with mode: 0755]
llvm/docs/convergence-natural-loop.png [new file with mode: 0755]
llvm/include/llvm/ADT/GenericCycleInfo.h
llvm/include/llvm/ADT/GenericUniformityImpl.h [new file with mode: 0644]
llvm/include/llvm/ADT/GenericUniformityInfo.h [new file with mode: 0644]
llvm/include/llvm/ADT/Uniformity.h [new file with mode: 0644]
llvm/include/llvm/Analysis/UniformityAnalysis.h [new file with mode: 0644]
llvm/include/llvm/CodeGen/MachineCycleAnalysis.h
llvm/include/llvm/CodeGen/MachinePassRegistry.def
llvm/include/llvm/CodeGen/MachineSSAContext.h
llvm/include/llvm/CodeGen/MachineUniformityAnalysis.h [new file with mode: 0644]
llvm/include/llvm/CodeGen/TargetInstrInfo.h
llvm/include/llvm/IR/SSAContext.h
llvm/include/llvm/InitializePasses.h
llvm/lib/Analysis/CMakeLists.txt
llvm/lib/Analysis/UniformityAnalysis.cpp [new file with mode: 0644]
llvm/lib/CodeGen/CMakeLists.txt
llvm/lib/CodeGen/CodeGen.cpp
llvm/lib/CodeGen/MachineCycleAnalysis.cpp
llvm/lib/CodeGen/MachineSSAContext.cpp
llvm/lib/CodeGen/MachineUniformityAnalysis.cpp [new file with mode: 0644]
llvm/lib/IR/SSAContext.cpp
llvm/lib/Passes/PassBuilder.cpp
llvm/lib/Passes/PassRegistry.def
llvm/lib/Target/AMDGPU/SIDefines.h
llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
llvm/lib/Target/AMDGPU/SIInstrInfo.h
llvm/test/Analysis/DivergenceAnalysis/AMDGPU/MIR/always-uniform-gmir.mir [new file with mode: 0644]
llvm/test/Analysis/DivergenceAnalysis/AMDGPU/MIR/always-uniform.mir [new file with mode: 0644]
llvm/test/Analysis/DivergenceAnalysis/AMDGPU/MIR/atomics-gmir.mir [new file with mode: 0644]
llvm/test/Analysis/DivergenceAnalysis/AMDGPU/MIR/atomics.mir [new file with mode: 0644]
llvm/test/Analysis/DivergenceAnalysis/AMDGPU/MIR/hidden-diverge-gmir.mir [new file with mode: 0644]
llvm/test/Analysis/DivergenceAnalysis/AMDGPU/MIR/hidden-diverge.mir [new file with mode: 0644]
llvm/test/Analysis/DivergenceAnalysis/AMDGPU/MIR/irreducible/branch-outside-gmir.mir [new file with mode: 0644]
llvm/test/Analysis/DivergenceAnalysis/AMDGPU/MIR/irreducible/diverged-entry-basic-gmir.mir [new file with mode: 0644]
llvm/test/Analysis/DivergenceAnalysis/AMDGPU/MIR/irreducible/exit-divergence-gmir.mir [new file with mode: 0644]
llvm/test/Analysis/DivergenceAnalysis/AMDGPU/MIR/irreducible/irreducible-1.mir [new file with mode: 0644]
llvm/test/Analysis/DivergenceAnalysis/AMDGPU/MIR/irreducible/irreducible-2-gmir.mir [new file with mode: 0644]
llvm/test/Analysis/DivergenceAnalysis/AMDGPU/MIR/join-loopexit-gmir.mir [new file with mode: 0644]
llvm/test/Analysis/DivergenceAnalysis/AMDGPU/MIR/loads-gmir.mir [new file with mode: 0644]
llvm/test/Analysis/DivergenceAnalysis/AMDGPU/MIR/never-uniform.mir [new file with mode: 0644]
llvm/test/Analysis/DivergenceAnalysis/AMDGPU/MIR/temporal-diverge-gmir.mir [new file with mode: 0644]
llvm/test/Analysis/DivergenceAnalysis/AMDGPU/always_uniform.ll
llvm/test/Analysis/DivergenceAnalysis/AMDGPU/atomics.ll
llvm/test/Analysis/DivergenceAnalysis/AMDGPU/b42473-r1-crash.ll
llvm/test/Analysis/DivergenceAnalysis/AMDGPU/control-flow-intrinsics.ll
llvm/test/Analysis/DivergenceAnalysis/AMDGPU/hidden_diverge.ll
llvm/test/Analysis/DivergenceAnalysis/AMDGPU/hidden_loopdiverge.ll
llvm/test/Analysis/DivergenceAnalysis/AMDGPU/inline-asm.ll
llvm/test/Analysis/DivergenceAnalysis/AMDGPU/interp_f16.ll
llvm/test/Analysis/DivergenceAnalysis/AMDGPU/intrinsics.ll
llvm/test/Analysis/DivergenceAnalysis/AMDGPU/irreducible/branch-outside.ll [new file with mode: 0644]
llvm/test/Analysis/DivergenceAnalysis/AMDGPU/irreducible/diverged-entry-basic.ll [new file with mode: 0644]
llvm/test/Analysis/DivergenceAnalysis/AMDGPU/irreducible/diverged-entry-headers-nested.ll [new file with mode: 0644]
llvm/test/Analysis/DivergenceAnalysis/AMDGPU/irreducible/diverged-entry-headers.ll [new file with mode: 0644]
llvm/test/Analysis/DivergenceAnalysis/AMDGPU/irreducible/exit-divergence.ll [new file with mode: 0644]
llvm/test/Analysis/DivergenceAnalysis/AMDGPU/irreducible/irreducible-1.ll [moved from llvm/test/Analysis/DivergenceAnalysis/AMDGPU/irreducible.ll with 72% similarity]
llvm/test/Analysis/DivergenceAnalysis/AMDGPU/irreducible/irreducible-2.ll [new file with mode: 0644]
llvm/test/Analysis/DivergenceAnalysis/AMDGPU/irreducible/reducible-headers.ll [new file with mode: 0644]
llvm/test/Analysis/DivergenceAnalysis/AMDGPU/join-at-loop-exit.ll
llvm/test/Analysis/DivergenceAnalysis/AMDGPU/join-at-loop-heart.ll [new file with mode: 0644]
llvm/test/Analysis/DivergenceAnalysis/AMDGPU/kernel-args.ll
llvm/test/Analysis/DivergenceAnalysis/AMDGPU/llvm.amdgcn.buffer.atomic.ll
llvm/test/Analysis/DivergenceAnalysis/AMDGPU/llvm.amdgcn.image.atomic.ll
llvm/test/Analysis/DivergenceAnalysis/AMDGPU/no-return-blocks.ll
llvm/test/Analysis/DivergenceAnalysis/AMDGPU/phi-undef.ll
llvm/test/Analysis/DivergenceAnalysis/AMDGPU/propagate-loop-live-out.ll
llvm/test/Analysis/DivergenceAnalysis/AMDGPU/temporal_diverge.ll
llvm/test/Analysis/DivergenceAnalysis/AMDGPU/trivial-join-at-loop-exit.ll
llvm/test/Analysis/DivergenceAnalysis/AMDGPU/unreachable-loop-block.ll
llvm/test/Analysis/DivergenceAnalysis/AMDGPU/workitem-intrinsics.ll
llvm/test/Analysis/DivergenceAnalysis/NVPTX/daorder.ll
llvm/test/Analysis/DivergenceAnalysis/NVPTX/diverge.ll
llvm/test/Analysis/DivergenceAnalysis/NVPTX/hidden_diverge.ll
llvm/test/Analysis/DivergenceAnalysis/NVPTX/irreducible.ll