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(parent: 87f017d) | patch
[AArch64] Prevent spilling between ldxr/stxr pairs
authorLemonBoy <thatlemon@gmail.com>
Sat, 1 May 2021 15:13:50 +0000 (17:13 +0200)
committerLemonBoy <thatlemon@gmail.com>
Sat, 1 May 2021 15:17:05 +0000 (17:17 +0200)
commit4751cadcca45984d7671e594ce95aed8fe030bf1
tree883ecfbf3e22d10542726a3a7d999ba3cc89805ctree | snapshot
parent87f017d69f5f7266fa261cfe469cadafeb74e121commit | diff
[AArch64] Prevent spilling between ldxr/stxr pairs

Apply the same logic used to check if CMPXCHG nodes should be expanded
at -O0: the register allocator may end up spilling some register in
between the atomic load/store pairs, breaking the atomicity and possibly
stalling the execution.

Fixes PR48017

Reviewed By: efriedman

Differential Revision: https://reviews.llvm.org/D101163
llvm/lib/Target/AArch64/AArch64ISelLowering.cpp diff | blob | history
llvm/test/CodeGen/AArch64/GlobalISel/arm64-atomic.ll diff | blob | history
llvm/test/CodeGen/AArch64/atomicrmw-O0.ll [new file with mode: 0644] blob
llvm/test/Transforms/AtomicExpand/AArch64/expand-atomicrmw-xchg-fp.ll diff | blob | history
Domain: System / Toolchain;