Switch the license of all files explicitly copyright the FSF
authorJoel Brobecker <brobecker@gnat.com>
Fri, 24 Aug 2007 14:30:15 +0000 (14:30 +0000)
committerJoel Brobecker <brobecker@gnat.com>
Fri, 24 Aug 2007 14:30:15 +0000 (14:30 +0000)
commit4744ac1bb0d2f2294c7762577262fdcafb67883b
treeaf0aa81d9c4a1948c20d623e02bdc952df80b240
parentb0b8c9e07a7ee9e5d6d4c6d2757da921071add7f
    Switch the license of all files explicitly copyright the FSF
        to GPLv3.
381 files changed:
sim/ChangeLog
sim/Makefile.in
sim/arm/Makefile.in
sim/arm/iwmmxt.c
sim/arm/iwmmxt.h
sim/arm/maverick.c
sim/arm/wrapper.c
sim/common/Make-common.in
sim/common/Makefile.in
sim/common/callback.c
sim/common/cgen-cpu.h
sim/common/cgen-defs.h
sim/common/cgen-engine.h
sim/common/cgen-mem.h
sim/common/cgen-ops.h
sim/common/cgen-par.c
sim/common/cgen-par.h
sim/common/cgen-run.c
sim/common/cgen-scache.c
sim/common/cgen-scache.h
sim/common/cgen-sim.h
sim/common/cgen-trace.c
sim/common/cgen-trace.h
sim/common/cgen-types.h
sim/common/cgen-utils.c
sim/common/dv-core.c
sim/common/dv-glue.c
sim/common/dv-pal.c
sim/common/dv-sockser.c
sim/common/dv-sockser.h
sim/common/genmloop.sh
sim/common/hw-alloc.c
sim/common/hw-alloc.h
sim/common/hw-base.c
sim/common/hw-base.h
sim/common/hw-device.c
sim/common/hw-device.h
sim/common/hw-events.c
sim/common/hw-events.h
sim/common/hw-handles.c
sim/common/hw-handles.h
sim/common/hw-instances.c
sim/common/hw-instances.h
sim/common/hw-main.h
sim/common/hw-ports.c
sim/common/hw-ports.h
sim/common/hw-properties.c
sim/common/hw-properties.h
sim/common/hw-tree.c
sim/common/hw-tree.h
sim/common/nrun.c
sim/common/run-sim.h
sim/common/run.c
sim/common/sim-abort.c
sim/common/sim-alu.h
sim/common/sim-arange.c
sim/common/sim-arange.h
sim/common/sim-assert.h
sim/common/sim-base.h
sim/common/sim-basics.h
sim/common/sim-bits.c
sim/common/sim-bits.h
sim/common/sim-config.c
sim/common/sim-config.h
sim/common/sim-core.c
sim/common/sim-core.h
sim/common/sim-cpu.c
sim/common/sim-cpu.h
sim/common/sim-endian.c
sim/common/sim-endian.h
sim/common/sim-engine.c
sim/common/sim-engine.h
sim/common/sim-events.c
sim/common/sim-events.h
sim/common/sim-fpu.c
sim/common/sim-fpu.h
sim/common/sim-hload.c
sim/common/sim-hrw.c
sim/common/sim-hw.c
sim/common/sim-hw.h
sim/common/sim-info.c
sim/common/sim-inline.c
sim/common/sim-inline.h
sim/common/sim-io.c
sim/common/sim-io.h
sim/common/sim-load.c
sim/common/sim-memopt.c
sim/common/sim-memopt.h
sim/common/sim-model.c
sim/common/sim-model.h
sim/common/sim-module.c
sim/common/sim-module.h
sim/common/sim-n-bits.h
sim/common/sim-n-core.h
sim/common/sim-n-endian.h
sim/common/sim-options.c
sim/common/sim-options.h
sim/common/sim-profile.c
sim/common/sim-profile.h
sim/common/sim-reason.c
sim/common/sim-reg.c
sim/common/sim-resume.c
sim/common/sim-run.c
sim/common/sim-signal.c
sim/common/sim-signal.h
sim/common/sim-stop.c
sim/common/sim-trace.c
sim/common/sim-trace.h
sim/common/sim-types.h
sim/common/sim-utils.c
sim/common/sim-utils.h
sim/common/sim-watch.c
sim/common/sim-watch.h
sim/common/syscall.c
sim/cris/Makefile.in
sim/cris/arch.c
sim/cris/arch.h
sim/cris/cpuall.h
sim/cris/cpuv10.c
sim/cris/cpuv10.h
sim/cris/cpuv32.c
sim/cris/cpuv32.h
sim/cris/cris-desc.c
sim/cris/cris-desc.h
sim/cris/cris-opc.h
sim/cris/cris-sim.h
sim/cris/cris-tmpl.c
sim/cris/crisv10f.c
sim/cris/crisv32f.c
sim/cris/decodev10.c
sim/cris/decodev10.h
sim/cris/decodev32.c
sim/cris/decodev32.h
sim/cris/devices.c
sim/cris/dv-cris.c
sim/cris/dv-rv.c
sim/cris/mloop.in
sim/cris/modelv10.c
sim/cris/modelv32.c
sim/cris/rvdummy.c
sim/cris/semcrisv10f-switch.c
sim/cris/semcrisv32f-switch.c
sim/cris/sim-if.c
sim/cris/sim-main.h
sim/cris/tconfig.in
sim/cris/traps.c
sim/d10v/Makefile.in
sim/erc32/Makefile.in
sim/frv/Makefile.in
sim/frv/arch.c
sim/frv/arch.h
sim/frv/cache.c
sim/frv/cache.h
sim/frv/cpu.c
sim/frv/cpu.h
sim/frv/cpuall.h
sim/frv/decode.c
sim/frv/decode.h
sim/frv/devices.c
sim/frv/frv-sim.h
sim/frv/frv.c
sim/frv/interrupts.c
sim/frv/memory.c
sim/frv/mloop.in
sim/frv/model.c
sim/frv/options.c
sim/frv/pipeline.c
sim/frv/profile-fr400.c
sim/frv/profile-fr400.h
sim/frv/profile-fr450.c
sim/frv/profile-fr500.c
sim/frv/profile-fr500.h
sim/frv/profile-fr550.c
sim/frv/profile-fr550.h
sim/frv/profile.c
sim/frv/profile.h
sim/frv/registers.c
sim/frv/registers.h
sim/frv/reset.c
sim/frv/sem.c
sim/frv/sim-if.c
sim/frv/sim-main.h
sim/frv/traps.c
sim/h8300/Makefile.in
sim/igen/Makefile.in
sim/igen/filter.c
sim/igen/filter.h
sim/igen/filter_host.c
sim/igen/filter_host.h
sim/igen/gen-engine.c
sim/igen/gen-engine.h
sim/igen/gen-icache.c
sim/igen/gen-icache.h
sim/igen/gen-idecode.c
sim/igen/gen-idecode.h
sim/igen/gen-itable.c
sim/igen/gen-itable.h
sim/igen/gen-model.c
sim/igen/gen-model.h
sim/igen/gen-semantics.c
sim/igen/gen-semantics.h
sim/igen/gen-support.c
sim/igen/gen-support.h
sim/igen/gen.c
sim/igen/gen.h
sim/igen/igen.c
sim/igen/igen.h
sim/igen/ld-cache.c
sim/igen/ld-cache.h
sim/igen/ld-decode.c
sim/igen/ld-decode.h
sim/igen/ld-insn.c
sim/igen/ld-insn.h
sim/igen/lf.c
sim/igen/lf.h
sim/igen/misc.c
sim/igen/misc.h
sim/igen/table.c
sim/igen/table.h
sim/iq2000/Makefile.in
sim/iq2000/arch.c
sim/iq2000/arch.h
sim/iq2000/cpu.c
sim/iq2000/cpu.h
sim/iq2000/cpuall.h
sim/iq2000/decode.c
sim/iq2000/decode.h
sim/iq2000/iq2000-sim.h
sim/iq2000/iq2000.c
sim/iq2000/mloop.in
sim/iq2000/model.c
sim/iq2000/sem-switch.c
sim/iq2000/sem.c
sim/iq2000/sim-if.c
sim/m32c/Makefile.in
sim/m32c/blinky.S
sim/m32c/configure.in
sim/m32c/cpu.h
sim/m32c/gdb-if.c
sim/m32c/gloss.S
sim/m32c/int.c
sim/m32c/int.h
sim/m32c/load.c
sim/m32c/load.h
sim/m32c/m32c.opc
sim/m32c/main.c
sim/m32c/mem.c
sim/m32c/mem.h
sim/m32c/misc.c
sim/m32c/misc.h
sim/m32c/opc2c.c
sim/m32c/r8c.opc
sim/m32c/reg.c
sim/m32c/safe-fgets.c
sim/m32c/safe-fgets.h
sim/m32c/sample.S
sim/m32c/sample.ld
sim/m32c/sample2.c
sim/m32c/srcdest.c
sim/m32c/syscalls.c
sim/m32c/syscalls.h
sim/m32c/trace.c
sim/m32c/trace.h
sim/m32r/Makefile.in
sim/m32r/arch.c
sim/m32r/arch.h
sim/m32r/cpu.c
sim/m32r/cpu.h
sim/m32r/cpu2.c
sim/m32r/cpu2.h
sim/m32r/cpuall.h
sim/m32r/cpux.c
sim/m32r/cpux.h
sim/m32r/decode.c
sim/m32r/decode.h
sim/m32r/decode2.c
sim/m32r/decode2.h
sim/m32r/decodex.c
sim/m32r/decodex.h
sim/m32r/devices.c
sim/m32r/m32r-sim.h
sim/m32r/m32r.c
sim/m32r/m32r2.c
sim/m32r/m32rx.c
sim/m32r/mloop.in
sim/m32r/mloop2.in
sim/m32r/mloopx.in
sim/m32r/model.c
sim/m32r/model2.c
sim/m32r/modelx.c
sim/m32r/sem-switch.c
sim/m32r/sem.c
sim/m32r/sem2-switch.c
sim/m32r/semx-switch.c
sim/m32r/sim-if.c
sim/m32r/traps-linux.c
sim/m32r/traps.c
sim/m68hc11/Makefile.in
sim/m68hc11/dv-m68hc11.c
sim/m68hc11/dv-m68hc11eepr.c
sim/m68hc11/dv-m68hc11sio.c
sim/m68hc11/dv-m68hc11spi.c
sim/m68hc11/dv-m68hc11tim.c
sim/m68hc11/dv-nvram.c
sim/m68hc11/emulos.c
sim/m68hc11/gencode.c
sim/m68hc11/interp.c
sim/m68hc11/interrupts.c
sim/m68hc11/interrupts.h
sim/m68hc11/m68hc11_sim.c
sim/m68hc11/sim-main.h
sim/mcore/Makefile.in
sim/mcore/interp.c
sim/mcore/sysdep.h
sim/mips/cp1.c
sim/mips/cp1.h
sim/mips/dsp.c
sim/mips/dsp.igen
sim/mips/dsp2.igen
sim/mips/dv-tx3904cpu.c
sim/mips/dv-tx3904irc.c
sim/mips/dv-tx3904sio.c
sim/mips/dv-tx3904tmr.c
sim/mips/m16e.igen
sim/mips/mdmx.c
sim/mips/mdmx.igen
sim/mips/mips3264r2.igen
sim/mips/mips3d.igen
sim/mips/sb1.igen
sim/mips/sim-main.h
sim/mips/smartmips.igen
sim/mn10300/Makefile.in
sim/mn10300/dv-mn103cpu.c
sim/mn10300/dv-mn103int.c
sim/mn10300/dv-mn103iop.c
sim/mn10300/dv-mn103ser.c
sim/mn10300/dv-mn103tim.c
sim/mn10300/sim-main.h
sim/ppc/altivec.igen
sim/ppc/altivec_expression.h
sim/ppc/altivec_registers.h
sim/ppc/dp-bit.c
sim/ppc/e500.igen
sim/ppc/e500_expression.h
sim/ppc/e500_registers.h
sim/ppc/gdb-sim.c
sim/sh/Makefile.in
sim/sh64/Makefile.in
sim/sh64/arch.c
sim/sh64/arch.h
sim/sh64/cpu.c
sim/sh64/cpu.h
sim/sh64/cpuall.h
sim/sh64/decode-compact.c
sim/sh64/decode-compact.h
sim/sh64/decode-media.c
sim/sh64/decode-media.h
sim/sh64/defs-compact.h
sim/sh64/defs-media.h
sim/sh64/eng.h
sim/sh64/sem-compact-switch.c
sim/sh64/sem-compact.c
sim/sh64/sem-media-switch.c
sim/sh64/sem-media.c
sim/sh64/sh-desc.c
sim/sh64/sh-desc.h
sim/sh64/sh-opc.h
sim/sh64/sh64-sim.h
sim/sh64/sh64.c
sim/sh64/sim-if.c
sim/testsuite/Makefile.in
sim/testsuite/common/bits-gen.c
sim/testsuite/d10v-elf/Makefile.in
sim/testsuite/frv-elf/Makefile.in
sim/testsuite/m32r-elf/Makefile.in
sim/testsuite/mips64el-elf/Makefile.in
sim/testsuite/sim/cris/asm/asm.exp
sim/testsuite/sim/cris/c/c.exp
sim/testsuite/sim/cris/hw/rv-n-cris/rvc.exp
sim/testsuite/sim/mips/mips32-dsp.s
sim/v850/Makefile.in