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[X86][SSE] combineReductionToHorizontal - add vXi8 ISD::MUL reduction handling (PR39709)
authorSimon Pilgrim <llvm-dev@redking.me.uk>
Sun, 13 Dec 2020 15:16:21 +0000 (15:16 +0000)
committerSimon Pilgrim <llvm-dev@redking.me.uk>
Sun, 13 Dec 2020 15:22:54 +0000 (15:22 +0000)
commit47321c311bdbe0145b9bf45d822185c37b19fa50
treeff5753b1ca66405eadf088d9586bb774fc7db385tree | snapshot
parent9c3fa3d84d5cdcdcdb5b6961f2c587f84e7caa39commit | diff
[X86][SSE] combineReductionToHorizontal - add vXi8 ISD::MUL reduction handling (PR39709)

Default expansion leads to repeated extensions/truncations to/from vXi16 which shuffle combining and demanded elts can't completely unravel.

Better just to promote (any_extend) the input and perform a vXi16 reduction.

We'll be able to remove a lot of this if we ever get decent legalization support for reduction intrinsics in SelectionDAG.
llvm/lib/Target/X86/X86ISelLowering.cpp diff | blob | history
llvm/lib/Target/X86/X86ISelLowering.h diff | blob | history
llvm/test/CodeGen/X86/vector-reduce-mul.ll diff | blob | history
Domain: System / Toolchain;