author | Hsiangkai Wang <kai.wang@sifive.com> | |
Thu, 14 Jan 2021 09:07:18 +0000 (17:07 +0800) | ||
committer | Hsiangkai Wang <kai.wang@sifive.com> | |
Thu, 21 Jan 2021 03:51:35 +0000 (11:51 +0800) | ||
commit | 47228f785460cdd8f642c42876d394198d6b90c3 | |
tree | 978ea219a10876e0a30665f52534794bd6e8b0df | tree | snapshot |
parent | baf6c2987e576e319857c586120e98e917d8b47f | commit | diff |
llvm/include/llvm/IR/IntrinsicsRISCV.td | diff | blob | history | |
llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp | diff | blob | history | |
llvm/lib/Target/RISCV/RISCVISelDAGToDAG.h | diff | blob | history | |
llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td | diff | blob | history | |
llvm/test/CodeGen/RISCV/rvv/vsseg-rv32.ll | [new file with mode: 0644] | blob |
llvm/test/CodeGen/RISCV/rvv/vsseg-rv64.ll | [new file with mode: 0644] | blob |