x86: tangier: Fix DMA controller IRQ polarity in CSRT
authorAndy Shevchenko <andriy.shevchenko@linux.intel.com>
Fri, 30 Jul 2021 20:15:44 +0000 (23:15 +0300)
committerBin Meng <bmeng.cn@gmail.com>
Mon, 2 Aug 2021 07:11:40 +0000 (15:11 +0800)
commit46db4bbac3287a114ddf941ad3861381b795197b
tree6e86cf8c56ced4667e0fcf04eeceb2a1bab99a4d
parentbd798eed5515ff435642b9b96f759aa0d7f2eb4c
x86: tangier: Fix DMA controller IRQ polarity in CSRT

IRQ polarity in CSRT has the same definition as by ACPI specification
chapter 19.6.64 "Interrupt (Interrupt Resource Descriptor Macro)", i.e.
ActiveHigh is 0, and ActiveLow is 1. On Intel Tangier the DMA controller
IRQ polarity is ActiveHigh.

Note, in DSDT (see southcluster.asl) it's described correctly.

Fixes: 5e99fde34a77 ("x86: tangier: Populate CSRT for shared DMA controller")
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
arch/x86/cpu/tangier/acpi.c