WIP: add other builtins to interstage IO

WIP: add other builtins to interstage IO

(Still adding tests: do not commit)

This fixes PR #632 so that:

(a) The 4 PerVertex builtins are added to an interface block for all stages except fragment.

(b) Other builtin qualified variables are added as "loose" linkage members.

(c) Arrayness from the PerVertex builtins is moved to the PerVertex block.

(d) Sometimes, two PerVertex blocks are created, one for in, one for out (e.g, for some GS that
    both reads and writes a Position)