drm/amd/display: Add missing mask sh for SYM32_TP_SQ_PULSE register
authorWenjing Liu <wenjing.liu@amd.com>
Thu, 23 Jun 2022 20:09:25 +0000 (16:09 -0400)
committerAlex Deucher <alexander.deucher@amd.com>
Thu, 6 Oct 2022 16:02:43 +0000 (12:02 -0400)
commit46c87432e3d4cea8e1a7ac6e9e3ebd2462f47617
treef37560b488f12b48f31b5ceffa76180c0bc28c44
parentf638fe27b817c755e017b8a6ae4b9b4224461941
drm/amd/display: Add missing mask sh for SYM32_TP_SQ_PULSE register

There is a missing register mask in dcn32 causing the hardware
programming is not executed when programming SQ_num test pattern for
DP2.

Reviewed-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Signed-off-by: Wenjing Liu <wenjing.liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/display/dc/dcn32/dcn32_hpo_dp_link_encoder.h