i2c: piix4: Add EFCH MMIO support to SMBus base address detect
authorTerry Bowman <terry.bowman@amd.com>
Wed, 9 Feb 2022 17:27:15 +0000 (11:27 -0600)
committerWolfram Sang <wsa@kernel.org>
Fri, 11 Feb 2022 14:38:22 +0000 (15:38 +0100)
commit46967bc1ee93acd1d8953c87dc16f43de4076f93
treeedcba793a3cf017824f9622b0226117da45612bd
parent7c148722d074c29fb998578eea5de3c14b9608c9
i2c: piix4: Add EFCH MMIO support to SMBus base address detect

The EFCH SMBus controller's base address is determined using details in
FCH::PM::DECODEEN[smbusasfiobase] and FCH::PM::DECODEEN[smbusasfioen].These
register fields were accessed using cd6h/cd7h port I/O. cd6h/cd7h port I/O
is no longer available in later AMD processors. Change base address
detection to use MMIO instead of port I/O cd6h/cd7h.

Signed-off-by: Terry Bowman <terry.bowman@amd.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Reviewed-by: Jean Delvare <jdelvare@suse.de>
Signed-off-by: Wolfram Sang <wsa@kernel.org>
drivers/i2c/busses/i2c-piix4.c