drm/i915/gvt: Optimize ring siwtch 2x faster again by light weight mmio access wrapper
authorChangbin Du <changbin.du@intel.com>
Fri, 23 Jun 2017 07:45:32 +0000 (15:45 +0800)
committerZhenyu Wang <zhenyuw@linux.intel.com>
Thu, 10 Aug 2017 02:26:06 +0000 (10:26 +0800)
commit4671ea204179dc705d4b0c31045e6acdfd6e59e8
tree852888a135c1fc7cf5c0bced5262cb925ae05726
parentf846c8de64ced9965e04cc9ae1922036175e395b
drm/i915/gvt: Optimize ring siwtch 2x faster again by light weight mmio access wrapper

The I915_READ/WRITE is not only a mmio read/write, it also contains
debug checking and Forcewake domain lookup. This is too heavy for
GVT ring switch case which access batch of mmio registers on ring
switch. We can handle Forcewake manually and use the raw
i915_read/write instead. The benefit from this is 2x faster mmio
switch performance.
         Before       After
cycles  ~550000      ~250000

v2: Use existing I915_READ_FW/I915_WRITE_FW macro. (zhenyu)

Signed-off-by: Changbin Du <changbin.du@intel.com>
Reviewed-by: Zhenyu Wang <zhenyuw@linux.intel.com>
Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
drivers/gpu/drm/i915/gvt/render.c