[X86][SSE] Add zero element and general 64-bit VZEXT_LOAD support to EltsFromConsecut...
authorSimon Pilgrim <llvm-dev@redking.me.uk>
Tue, 26 Jan 2016 09:30:08 +0000 (09:30 +0000)
committerSimon Pilgrim <llvm-dev@redking.me.uk>
Tue, 26 Jan 2016 09:30:08 +0000 (09:30 +0000)
commit46696ef93c64d60864858d9bd1e76e62d64965ee
tree4fc365d431a01a60e688e38130c23ab2690658f7
parentc9655d9bd5c6053af394c23701977a42d50209cc
[X86][SSE] Add zero element and general 64-bit VZEXT_LOAD support to EltsFromConsecutiveLoads

This patch adds support for trailing zero elements to VZEXT_LOAD loads (and checks that no zero elts occur within the consecutive load).

It also generalizes the 64-bit VZEXT_LOAD load matching to work for loads other than 2x32-bit loads.

After this patch it will also be easier to add support for other basic load patterns like 32-bit VZEXT_LOAD loads, PMOVZX and subvector load insertion.

Differential Revision: http://reviews.llvm.org/D16217

llvm-svn: 258798
llvm/lib/Target/X86/X86ISelLowering.cpp
llvm/test/CodeGen/X86/merge-consecutive-loads-128.ll