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author	Matt Arsenault <Matthew.Arsenault@amd.com>
	Fri, 2 Dec 2022 20:45:38 +0000 (15:45 -0500)
committer	Matt Arsenault <Matthew.Arsenault@amd.com>
	Fri, 2 Dec 2022 21:19:38 +0000 (16:19 -0500)
commit	46584de02c1a38a0ccde85cb5c16331380966c36
tree	707b4125b83e7184bcd0691e2690a70845e1236b	tree \| snapshot
parent	9585500feab5478439d9a08d21537769833c0f2f	commit \| diff

AArch64/GlobalISel: Convert tests to opaque pointers

inttoptr_add.ll had a mangled bitcast constantexpr.
translate-gep.ll: Restored a 0 GEP

76 files changed:

llvm/test/CodeGen/AArch64/GlobalISel/arm64-atomic-128.ll		diff \| blob \| history
llvm/test/CodeGen/AArch64/GlobalISel/arm64-atomic.ll		diff \| blob \| history
llvm/test/CodeGen/AArch64/GlobalISel/arm64-callingconv.ll		diff \| blob \| history
llvm/test/CodeGen/AArch64/GlobalISel/arm64-fallback.ll		diff \| blob \| history
llvm/test/CodeGen/AArch64/GlobalISel/arm64-irtranslator-gep.ll		diff \| blob \| history
llvm/test/CodeGen/AArch64/GlobalISel/arm64-irtranslator-stackprotect.ll		diff \| blob \| history
llvm/test/CodeGen/AArch64/GlobalISel/arm64-irtranslator-switch.ll		diff \| blob \| history
llvm/test/CodeGen/AArch64/GlobalISel/arm64-irtranslator.ll		diff \| blob \| history
llvm/test/CodeGen/AArch64/GlobalISel/arm64-pcsections.ll		diff \| blob \| history
llvm/test/CodeGen/AArch64/GlobalISel/assert-align.ll		diff \| blob \| history
llvm/test/CodeGen/AArch64/GlobalISel/builtin-return-address-pacret.ll		diff \| blob \| history
llvm/test/CodeGen/AArch64/GlobalISel/byval-call.ll		diff \| blob \| history
llvm/test/CodeGen/AArch64/GlobalISel/call-lowering-const-bitcast-func.ll		diff \| blob \| history
llvm/test/CodeGen/AArch64/GlobalISel/call-translator-cse.ll		diff \| blob \| history
llvm/test/CodeGen/AArch64/GlobalISel/call-translator-ios.ll		diff \| blob \| history
llvm/test/CodeGen/AArch64/GlobalISel/call-translator-tail-call-sret.ll		diff \| blob \| history
llvm/test/CodeGen/AArch64/GlobalISel/call-translator-tail-call.ll		diff \| blob \| history
llvm/test/CodeGen/AArch64/GlobalISel/call-translator-variadic-musttail.ll		diff \| blob \| history
llvm/test/CodeGen/AArch64/GlobalISel/call-translator.ll		diff \| blob \| history
llvm/test/CodeGen/AArch64/GlobalISel/combine-shift-of-shifted-dbg-value-fallback.ll		diff \| blob \| history
llvm/test/CodeGen/AArch64/GlobalISel/combiner-load-store-indexing.ll		diff \| blob \| history
llvm/test/CodeGen/AArch64/GlobalISel/constant-dbg-loc.ll		diff \| blob \| history
llvm/test/CodeGen/AArch64/GlobalISel/darwin-tls-call-clobber.ll		diff \| blob \| history
llvm/test/CodeGen/AArch64/GlobalISel/debug-cpp.ll		diff \| blob \| history
llvm/test/CodeGen/AArch64/GlobalISel/debug-insts.ll		diff \| blob \| history
llvm/test/CodeGen/AArch64/GlobalISel/dynamic-alloca-lifetime.ll		diff \| blob \| history
llvm/test/CodeGen/AArch64/GlobalISel/dynamic-alloca.ll		diff \| blob \| history
llvm/test/CodeGen/AArch64/GlobalISel/freeze.ll		diff \| blob \| history
llvm/test/CodeGen/AArch64/GlobalISel/gisel-fail-intermediate-legalizer.ll		diff \| blob \| history
llvm/test/CodeGen/AArch64/GlobalISel/inttoptr_add.ll		diff \| blob \| history
llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-atomic-metadata.ll		diff \| blob \| history
llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-block-order.ll		diff \| blob \| history
llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-delayed-stack-protector.ll		diff \| blob \| history
llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-dilocation.ll		diff \| blob \| history
llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-exceptions.ll		diff \| blob \| history
llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-extract-used-by-dbg.ll		diff \| blob \| history
llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-indirect-br-repeated-block.ll		diff \| blob \| history
llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-inline-asm.ll		diff \| blob \| history
llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-invoke-probabilities.ll		diff \| blob \| history
llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-load-metadata.ll		diff \| blob \| history
llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-localescape.ll		diff \| blob \| history
llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-max-address-space.ll		diff \| blob \| history
llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-memcpy-inline.ll		diff \| blob \| history
llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-memfunc-undef.ll		diff \| blob \| history
llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-no-op-intrinsics.ll		diff \| blob \| history
llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-no-unwind-inline-asm.ll		diff \| blob \| history
llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-one-by-n-vector-ptr-add.ll		diff \| blob \| history
llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-stack-objects.ll		diff \| blob \| history
llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-stack-protector-windows.ll		diff \| blob \| history
llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-store-metadata.ll		diff \| blob \| history
llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-switch-bittest.ll		diff \| blob \| history
llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-tbaa.ll		diff \| blob \| history
llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-unwind-inline-asm.ll		diff \| blob \| history
llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-volatile-load-pr36018.ll		diff \| blob \| history
llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-weird-alloca-size.ll		diff \| blob \| history
llvm/test/CodeGen/AArch64/GlobalISel/legalize-exceptions.ll		diff \| blob \| history
llvm/test/CodeGen/AArch64/GlobalISel/localizer-arm64-tti.ll		diff \| blob \| history
llvm/test/CodeGen/AArch64/GlobalISel/memcpy_chk_no_tail.ll		diff \| blob \| history
llvm/test/CodeGen/AArch64/GlobalISel/merge-stores-truncating.ll		diff \| blob \| history
llvm/test/CodeGen/AArch64/GlobalISel/no-neon-no-fp.ll		diff \| blob \| history
llvm/test/CodeGen/AArch64/GlobalISel/ret-1x-vec.ll		diff \| blob \| history
llvm/test/CodeGen/AArch64/GlobalISel/ret-vec-promote.ll		diff \| blob \| history
llvm/test/CodeGen/AArch64/GlobalISel/select-bitfield-insert.ll		diff \| blob \| history
llvm/test/CodeGen/AArch64/GlobalISel/select-frameaddr.ll		diff \| blob \| history
llvm/test/CodeGen/AArch64/GlobalISel/select-returnaddr.ll		diff \| blob \| history
llvm/test/CodeGen/AArch64/GlobalISel/store-merging.ll		diff \| blob \| history
llvm/test/CodeGen/AArch64/GlobalISel/swifterror.ll		diff \| blob \| history
llvm/test/CodeGen/AArch64/GlobalISel/swiftself.ll		diff \| blob \| history
llvm/test/CodeGen/AArch64/GlobalISel/translate-constant-dag.ll		diff \| blob \| history
llvm/test/CodeGen/AArch64/GlobalISel/translate-gep.ll		diff \| blob \| history
llvm/test/CodeGen/AArch64/GlobalISel/translate-ret.ll		diff \| blob \| history
llvm/test/CodeGen/AArch64/GlobalISel/unknown-intrinsic.ll		diff \| blob \| history
llvm/test/CodeGen/AArch64/GlobalISel/unwind-inline-asm.ll		diff \| blob \| history
llvm/test/CodeGen/AArch64/GlobalISel/v8.4-atomic-128.ll		diff \| blob \| history
llvm/test/CodeGen/AArch64/GlobalISel/varargs-ios-translator.ll		diff \| blob \| history
llvm/test/CodeGen/AArch64/GlobalISel/vastart.ll		diff \| blob \| history

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