[X86] Enable fp128 as a legal type with SSE1 rather than with MMX.
authorCraig Topper <craig.topper@intel.com>
Mon, 2 Sep 2019 20:16:30 +0000 (20:16 +0000)
committerCraig Topper <craig.topper@intel.com>
Mon, 2 Sep 2019 20:16:30 +0000 (20:16 +0000)
commit45cd1851097c61b7eee73b93fee4f09fc2a57d3c
treef064177a259e0077b38d7db947253fe8a5a44897
parenta5fd8d8f47d761a9307696987191bb87f9c06d9e
[X86] Enable fp128 as a legal type with SSE1 rather than with MMX.

FP128 values are passed in xmm registers so should be asssociated
with an SSE feature rather than MMX which uses a different set
of registers.

llc enables sse1 and sse2 by default with x86_64. But does not
enable mmx. Clang enables all 3 features by default.

I've tried to add command lines to test with -sse
where possible, but any test that returns a value in an xmm
register fails with a fatal error with -sse since we have no
defined ABI for that scenario.

llvm-svn: 370682
llvm/lib/Target/X86/X86ISelLowering.cpp
llvm/test/CodeGen/X86/atomic-non-integer-fp128.ll [new file with mode: 0644]
llvm/test/CodeGen/X86/atomic-non-integer.ll
llvm/test/CodeGen/X86/atomicf128.ll
llvm/test/CodeGen/X86/extract-store.ll
llvm/test/CodeGen/X86/fp128-cast.ll
llvm/test/CodeGen/X86/fp128-select.ll
llvm/test/CodeGen/X86/vec_fp_to_int.ll