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(parent: fa3217c) | patch
drm/i915/dg2: UHBR tables added for pll programming
authorAnimesh Manna <animesh.manna@intel.com>
Fri, 27 Aug 2021 10:38:43 +0000 (13:38 +0300)
committerJani Nikula <jani.nikula@intel.com>
Mon, 30 Aug 2021 10:24:44 +0000 (13:24 +0300)
commit45cbbe50ccb10452c9369c2e58f0fdee90abae0b
treecb3297b52c423bbc078b999c64d94025b102aa1ctree | snapshot
parentfa3217c4948700d0d4e85c5fad41fe27d663a507commit | diff
drm/i915/dg2: UHBR tables added for pll programming

UHBR modes has higher link rate and added new values for programming
mpll of SNPS phy. No change in sequence, only the pll parameters
are different for UHBR modes.

Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Animesh Manna <animesh.manna@intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20210827103843.527-1-jani.nikula@intel.com
drivers/gpu/drm/i915/display/intel_snps_phy.c diff | blob | history
drivers/gpu/drm/i915/i915_reg.h diff | blob | history
Domain: System / Kernel;