[InstCombine] (mul nsw 1, INT_MIN) != (shl nsw 1, 31)
authorDavid Majnemer <david.majnemer@gmail.com>
Sat, 18 Apr 2015 04:41:30 +0000 (04:41 +0000)
committerDavid Majnemer <david.majnemer@gmail.com>
Sat, 18 Apr 2015 04:41:30 +0000 (04:41 +0000)
commit45951a662644f5a5e021806e8a75984115b9ebef
tree54d70f816966da0010e265f243109b36c884f099
parent279e3ee954fd41164fd78e4f20ea54a3c53cc5c8
[InstCombine] (mul nsw 1, INT_MIN) != (shl nsw 1, 31)

Multiplying INT_MIN by 1 doesn't trigger nsw.  However, shifting 1 into
the sign bit *does* trigger nsw.

llvm-svn: 235250
llvm/lib/Transforms/InstCombine/InstCombineMulDivRem.cpp
llvm/test/Transforms/InstCombine/mul.ll