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(parent: b1fe667) | patch
drm/i915/bdw: Implement PPGTT clear range
authorBen Widawsky <benjamin.widawsky@intel.com>
Sun, 3 Nov 2013 04:07:23 +0000 (21:07 -0700)
committerDaniel Vetter <daniel.vetter@ffwll.ch>
Fri, 8 Nov 2013 17:09:46 +0000 (18:09 +0100)
commit459108b8cccfeeb965653b51be0160784e51fdc0
treec44a6e796110d4ae0795c763c58351f8be9f8852tree | snapshot
parentb1fe6673298113636f356dce8e8ac2a93a579882commit | diff
drm/i915/bdw: Implement PPGTT clear range

GEN8 PPGTT range clearing is very similar to GEN6 if we assume that our
PDEs are all valid, which they should be.

v2: Rebase on top of the address space refactoring.

v3: Rebase on top of the bool use_scratch addition to the clear_range interface.

Reviewed-by: Imre Deak <imre.deak@intel.com>
Signed-off-by: Ben Widawsky <ben@bwidawsk.net> (v1)
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
drivers/gpu/drm/i915/i915_gem_gtt.c diff | blob | history
Domain: System / Kernel;