[AAch64] Optimize muls with operands having enough zero bits.
authorbipmis <biplob.mishra@arm.com>
Tue, 20 Dec 2022 14:34:17 +0000 (14:34 +0000)
committerbipmis <biplob.mishra@arm.com>
Tue, 20 Dec 2022 14:34:17 +0000 (14:34 +0000)
commit454997d3965936ebc813d4bea5e3a639fb0e7cb4
tree3e062dd1206e784d72af63a76bb70ca3725d9bee
parentebe530ef7a49988a531a8928eac3ce0925f1c199
[AAch64] Optimize muls with operands having enough zero bits.

Muls with 64bit operands where each of the operand is having top 32 bits as zero, we can generate a single umull instruction on a 32bit operand.

Differential Revision: https://reviews.llvm.org/D139411
llvm/lib/Target/AArch64/AArch64InstrInfo.td
llvm/test/CodeGen/AArch64/aarch64-mull-masks.ll
llvm/test/CodeGen/AArch64/addcarry-crash.ll