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(parent: e6cbb91) | patch
[PowerPC] add a new subtarget feature fastMFLR
authorChen Zheng <czhengsz@cn.ibm.com>
Tue, 8 Nov 2022 06:35:55 +0000 (01:35 -0500)
committerChen Zheng <czhengsz@cn.ibm.com>
Thu, 10 Nov 2022 05:07:47 +0000 (00:07 -0500)
commit454758ab69315e4e20f5cb0746535f7665dbcfe4
tree9a8135564f0a3beab7223b8132e23fde67bad921tree | snapshot
parente6cbb9148366ea4ac35e34bfe351394560934187commit | diff
[PowerPC] add a new subtarget feature fastMFLR

Some PowerPC CPU may have slow MFLR instruction, so we need to
schedule the MFLR and its store in function prologue away to
hidden the long latency for slow MFLR instruction.

This patch adds a new feature fastMFLR and the new feature will
be used in https://reviews.llvm.org/D137423.

Reviewed By: RolandF

Differential Revision: https://reviews.llvm.org/D137612
llvm/lib/Target/PowerPC/PPC.td diff | blob | history
llvm/lib/Target/PowerPC/PPCSubtarget.cpp diff | blob | history
llvm/lib/Target/PowerPC/PPCSubtarget.h diff | blob | history
Domain: System / Toolchain;