intel/fs: Teach the lower_regioning pass how to split instructions of unsuported...
authorFrancisco Jerez <currojerez@riseup.net>
Mon, 20 Dec 2021 22:15:47 +0000 (14:15 -0800)
committerMarge Bot <emma+marge@anholt.net>
Tue, 25 Jan 2022 22:40:44 +0000 (22:40 +0000)
commit44e48751d2451662796983e61f85f68f4ec597e5
treefc9c3751c9cc5fc01e9c310b24cb742e138b99f7
parent539c879a6b6fda5aca91097998f95ac03b76166a
intel/fs: Teach the lower_regioning pass how to split instructions of unsuported exec type.

This adds some generic infrastructure that allows splitting any
instruction into a number of instructions of a smaller legal execution
type.  This is meant to replace several instances of handcrafted 64bit
type lowering done manually in the code generator, which is rather
error-prone, prevents scheduling of the lowered instructions, and
makes them invisible to the SWSB pass on Gfx12+ platforms, which will
become especially problematic on Gfx12.5+ since the EUs introduce
multiple asynchronous execution pipelines which the SWSB pass needs to
be able to synchronize to one another, so it's critical for the real
execution type of the instruction to be visible to the SWSB pass.

Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14273>
src/intel/compiler/brw_fs_lower_regioning.cpp