phy: cadence: Add driver for Sierra PHY
authorAlan Douglas <adouglas@cadence.com>
Mon, 12 Nov 2018 16:42:16 +0000 (16:42 +0000)
committerKishon Vijay Abraham I <kishon@ti.com>
Wed, 12 Dec 2018 04:31:38 +0000 (10:01 +0530)
commit44d30d622821d3bf7fa74b62e2ea62bde314ec1b
treeea4260171a4b59ff2ac69551a6a270acb66ecd8d
parentcb96a690724e105f149b27a88d66669c53b01625
phy: cadence: Add driver for Sierra PHY

Add a Sierra PHY driver with PCIe and USB support.

The PHY has multiple lanes, which can be configured into
groups, and a generic PHY device is created for each group.

There are two resets controlling the overall PHY block, one
to enable the APB interface for programming registers, and
another to enable the PHY itself.  Additionally there are
resets for each PHY lane.

The PHY can be configured in hardware to read register
settings from ROM, or they can be written by the driver.

The sequence of operation on startup is to enable the APB
bus, write the PHY registers (if required)  for each lane
group, and then enable the PHY.  Each group of lanes
can then be individually controlled using the power_on()/
power_off() function for that generic PHY

Signed-off-by: Alan Douglas <adouglas@cadence.com>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
drivers/phy/cadence/Kconfig
drivers/phy/cadence/Makefile
drivers/phy/cadence/phy-cadence-sierra.c [new file with mode: 0644]