ddr: marvell: a38x: disable WL phase correction stage in case of bus_width=16bit
authorMoti Buskila <motib@marvell.com>
Fri, 19 Feb 2021 16:11:20 +0000 (17:11 +0100)
committerStefan Roese <sr@denx.de>
Fri, 26 Feb 2021 09:22:29 +0000 (10:22 +0100)
commit44aeb28c9b4475526d2b87172b4ed1867072b030
treec88100f2602f76fa880eb0c504f9ef17c784a343
parent32e7a6baef2bcaacd5e2ca2d788072a487c5e311
ddr: marvell: a38x: disable WL phase correction stage in case of bus_width=16bit

commit 20c89a28548cdab11f88d2ec8936344af0686a1e upstream.

WL phase correcion stage is failing while using bus_width of 16bit, not
to be fix this stage is un-necessary when working with bus_width of 16
bit.

Signed-off-by: Moti Buskila <motib@marvell.com>
Reviewed-by: Kostya Porotchkin <kostap@marvell.com>
Signed-off-by: Marek BehĂșn <marek.behun@nic.cz>
Tested-by: Chris Packham <chris.packham@alliedtelesis.co.nz>
drivers/ddr/marvell/a38x/ddr3_training_db.c