Merge tag 'zynqmp-soc-for-v5.5' of https://github.com/Xilinx/linux-xlnx into arm...
authorOlof Johansson <olof@lixom.net>
Fri, 8 Nov 2019 18:27:55 +0000 (10:27 -0800)
committerOlof Johansson <olof@lixom.net>
Fri, 8 Nov 2019 18:27:57 +0000 (10:27 -0800)
commit44a39847787b022c9f64b48b41c9d2f9dcd815f4
tree197fdf07ebab080177683febdf2126d56ff77f1e
parentd4b0c97a80891d5fb8d73230730f28a42f16fe28
parentaf3f1afac38d34083faad852172d0ec82749c046
Merge tag 'zynqmp-soc-for-v5.5' of https://github.com/Xilinx/linux-xlnx into arm/drivers

arm64: soc: Xilinx SoC changes for v5.5

- Extend firmware interface to cover Versal chip

* tag 'zynqmp-soc-for-v5.5' of https://github.com/Xilinx/linux-xlnx:
  firmware: xilinx: Add support for versal soc
  dt-bindings: firmware: Add bindings for Versal firmware
  soc: xilinx: Set CAP_UNUSABLE requirement for versal while powering down domain

Link: https://lore.kernel.org/r/6954a53c-6dab-c7a3-7257-58460ca952cb@monstr.eu
Signed-off-by: Olof Johansson <olof@lixom.net>