MIPS: Fix some missing CONFIG_CPU_MIPSR6 #ifdefs
authorHuacai Chen <chenhc@lemote.com>
Thu, 21 Jan 2016 13:09:52 +0000 (21:09 +0800)
committerSasha Levin <sasha.levin@oracle.com>
Mon, 15 Feb 2016 20:45:26 +0000 (15:45 -0500)
commit4470ba0e8a7f353cf3868eca475272d49605f823
treeb8b9e248b2509e646ecf776262a31c4173db29cb
parent156e0fd0ecf2f78b732584253a2f21c56a7e79ba
MIPS: Fix some missing CONFIG_CPU_MIPSR6 #ifdefs

[ Upstream commit 4f33f6c522948fffc345261896042b58dea23754 ]

Commit be0c37c985eddc4 (MIPS: Rearrange PTE bits into fixed positions.)
defines fixed PTE bits for MIPS R2. Then, commit d7b631419b3d230a4d383
(MIPS: pgtable-bits: Fix XPA damage to R6 definitions.) adds the MIPS
R6 definitions in the same way as MIPS R2. But some R6 #ifdefs in the
later commit are missing, so in this patch I fix that.

Signed-off-by: Huacai Chen <chenhc@lemote.com>
Cc: Aurelien Jarno <aurelien@aurel32.net>
Cc: Steven J. Hill <Steven.Hill@imgtec.com>
Cc: Fuxin Zhang <zhangfx@lemote.com>
Cc: Zhangjin Wu <wuzhangjin@gmail.com>
Cc: linux-mips@linux-mips.org
Cc: stable@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/12164/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Signed-off-by: Sasha Levin <sasha.levin@oracle.com>
arch/mips/include/asm/pgtable.h
arch/mips/mm/tlbex.c