perf/x86/intel/uncore: Add Rocket Lake support
authorKan Liang <kan.liang@linux.intel.com>
Mon, 19 Oct 2020 15:35:28 +0000 (08:35 -0700)
committerPeter Zijlstra <peterz@infradead.org>
Thu, 29 Oct 2020 10:00:40 +0000 (11:00 +0100)
commit43bc103a8044b9f7963aa1684efbdc9bd60939de
tree77bb13902f27151fff47e40f4dee221adda572cd
parent907a196fbc70a48338ee8512da32f70fd33c97eb
perf/x86/intel/uncore: Add Rocket Lake support

For Rocket Lake, the MSR uncore, e.g., CBOX, ARB and CLOCKBOX, are the
same as Tiger Lake. Share the perf code with it.

For Rocket Lake and Tiger Lake, the 8th CBOX is not mapped into a
different MSR space anymore. Add rkl_uncore_msr_init_box() to replace
skl_uncore_msr_init_box().

The IMC uncore is the similar to Ice Lake. Add new PCIIDs of IMC for
Rocket Lake.

Signed-off-by: Kan Liang <kan.liang@linux.intel.com>
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Link: https://lkml.kernel.org/r/20201019153528.13850-4-kan.liang@linux.intel.com
arch/x86/events/intel/uncore.c
arch/x86/events/intel/uncore_snb.c