riscv: andes_plic: Fix some wrong configurations
authorRick Chen <rick@andestech.com>
Thu, 14 Nov 2019 05:52:24 +0000 (13:52 +0800)
committerAndes <uboot@andestech.com>
Tue, 10 Dec 2019 00:23:10 +0000 (08:23 +0800)
commit43a0832ba09068d1ab0628afbe62e498450ece63
tree788ce3e2f6e2c6761d87f889916ea43f17d904a4
parent7e24518c904d9cab8185a1248a24e86c4ceb19ae
riscv: andes_plic: Fix some wrong configurations

Fix two wrong settings of andes plic driver as below:

1. Fix wrong pending register base definition.
2. Declaring the en variable in enable_ipi() as unsigned int instead of
   int can help to fix wrong plic enabling setting in RV64.

Signed-off-by: Rick Chen <rick@andestech.com>
Cc: KC Lin <kclin@andestech.com>
Cc: Alan Kao <alankao@andestech.com>
arch/riscv/lib/andes_plic.c