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(parent: 08145b0) | patch
LoongArch: Add writecombine support for drm
authorHuacai Chen <chenhuacai@loongson.cn>
Tue, 31 May 2022 10:04:10 +0000 (18:04 +0800)
committerHuacai Chen <chenhuacai@loongson.cn>
Fri, 3 Jun 2022 12:09:27 +0000 (20:09 +0800)
commit439057ec3b748b1ff61855d09859f369493e22d8
tree488f331128a8ba653855b4434dcf1825b12804bbtree | snapshot
parent08145b087e4481458f6075f3af58021a3cf8a940commit | diff
LoongArch: Add writecombine support for drm

LoongArch maintains cache coherency in hardware, but its WUC attribute
(Weak-ordered UnCached, which is similar to WC) is out of the scope of
cache coherency machanism. This means WUC can only used for write-only
memory regions.

Cc: Daniel Vetter <daniel@ffwll.ch>
Cc: dri-devel@lists.freedesktop.org
Reviewed-by: WANG Xuerui <git@xen0n.name>
Reviewed-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
Signed-off-by: Huacai Chen <chenhuacai@loongson.cn>
drivers/gpu/drm/drm_vm.c diff | blob | history
drivers/gpu/drm/ttm/ttm_module.c diff | blob | history
include/drm/drm_cache.h diff | blob | history
Domain: System / Kernel;