net: stmmac: enable tx queue 0 for gmac4 IPs synthesized with multiple TX queues
authorNiklas Cassel <niklas.cassel@axis.com>
Thu, 24 Nov 2016 14:36:33 +0000 (15:36 +0100)
committerDavid S. Miller <davem@davemloft.net>
Wed, 30 Nov 2016 00:10:47 +0000 (19:10 -0500)
commit436feafe95cc2de3e1a56a0679c80291e1776894
tree1beb1890773e1958ae1c312dbd0f97d517eb4090
parent530742e707190b585f0874876ad1fcac9a0abbcb
net: stmmac: enable tx queue 0 for gmac4 IPs synthesized with multiple TX queues

The dwmac4 IP can synthesized with 1-8 number of tx queues.
On an IP synthesized with DWC_EQOS_NUM_TXQ > 1, all txqueues are disabled
by default. For these IPs, the bitfield TXQEN is R/W.

Always enable tx queue 0. The write will have no effect on IPs synthesized
with DWC_EQOS_NUM_TXQ == 1.

The driver does still not utilize more than one tx queue in the IP.

Signed-off-by: Niklas Cassel <niklas.cassel@axis.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
drivers/net/ethernet/stmicro/stmmac/dwmac4.h
drivers/net/ethernet/stmicro/stmmac/dwmac4_dma.c