[Mips][Disassembler]When disassembler meets load/store from coprocessor 2 instruction...
authorVladimir Medic <Vladimir.Medic@imgtec.com>
Wed, 21 Jan 2015 10:47:36 +0000 (10:47 +0000)
committerVladimir Medic <Vladimir.Medic@imgtec.com>
Wed, 21 Jan 2015 10:47:36 +0000 (10:47 +0000)
commit435cf8a41577b8fd72434082c334608d8de5ff4e
treeea87511e9e39d7249082a1f5216722c415ce853e
parentcb273921dea04ce9229e1c02af47dfeca1a5c2b8
[Mips][Disassembler]When disassembler meets load/store from coprocessor 2 instructions for mips r6 it crashes as the access to operands array is out of range. This patch adds dedicated decoder method that properly handles decoding of these instructions.

llvm-svn: 226652
llvm/lib/Target/Mips/Disassembler/MipsDisassembler.cpp
llvm/lib/Target/Mips/Mips32r6InstrInfo.td
llvm/test/MC/Disassembler/Mips/mips32r6/valid-mips32r6-el.txt
llvm/test/MC/Disassembler/Mips/mips32r6/valid-mips32r6.txt
llvm/test/MC/Disassembler/Mips/mips32r6/valid-xfail-mips32r6.txt
llvm/test/MC/Disassembler/Mips/mips64r6/valid-mips64r6-el.txt
llvm/test/MC/Disassembler/Mips/mips64r6/valid-mips64r6.txt
llvm/test/MC/Disassembler/Mips/mips64r6/valid-xfail-mips64r6.txt