MIPS: Actually decode JALX in `__compute_return_epc_for_insn'
authorMaciej W. Rozycki <macro@imgtec.com>
Thu, 15 Jun 2017 23:06:19 +0000 (00:06 +0100)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Thu, 27 Jul 2017 22:08:04 +0000 (15:08 -0700)
commit434c9f2e3b4667859a705b48d53f23f5f629ecf1
treef6bdb285c95cb0ebc0fc2756167931dab4243f52
parentf8c331cbc937d849d93dc9f3f7cdc31d5fbac58e
MIPS: Actually decode JALX in `__compute_return_epc_for_insn'

commit a9db101b735a9d49295326ae41f610f6da62b08c upstream.

Complement commit fb6883e5809c ("MIPS: microMIPS: Support handling of
delay slots.") and actually decode the regular MIPS JALX major
instruction opcode, the handling of which has been added with the said
commit for EPC calculation in `__compute_return_epc_for_insn'.

Fixes: fb6883e5809c ("MIPS: microMIPS: Support handling of delay slots.")
Signed-off-by: Maciej W. Rozycki <macro@imgtec.com>
Cc: James Hogan <james.hogan@imgtec.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/16394/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
arch/mips/kernel/branch.c