FPGA: Add TS-7300 FPGA manager
authorFlorian Fainelli <f.fainelli@gmail.com>
Mon, 27 Feb 2017 22:14:22 +0000 (16:14 -0600)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Fri, 17 Mar 2017 06:10:48 +0000 (15:10 +0900)
commit4348f7e2ae250d9b986b08c8e8ea8a402790f369
tree3f3a646a8210719a515ff68a045c78b67dff1d29
parent161db575ef6c3b0a6d96dc263abb39cd0dc0f0c2
FPGA: Add TS-7300 FPGA manager

Add support for loading bitstreams on the Altera Cyclone II FPGA
populated on the TS-7300 board. This is done through the configuration
and data registers offered through a memory interface between the EP93xx
SoC and the FPGA via an intermediate CPLD device.

The EP93xx SoC on the TS-7300 does not have direct means of configuring
the on-board FPGA other than by using the special memory mapped
interface to the CPLD. No other entity on the system can control the
FPGA bitstream.

Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Acked-by: Alan Tull <atull@opensource.altera.com>
Acked-by: Moritz Fischer <moritz.fischer@ettus.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
drivers/fpga/Kconfig
drivers/fpga/Makefile
drivers/fpga/ts73xx-fpga.c [new file with mode: 0644]