[ValueTypes] Define MVTs for v128i2/v64i4 as well as i2 and i4.
authorHendrik Greving <hgreving@google.com>
Fri, 6 May 2022 23:02:31 +0000 (16:02 -0700)
committerHendrik Greving <hgreving@google.com>
Wed, 1 Jun 2022 19:48:01 +0000 (12:48 -0700)
commit430ac5c3029c52e391e584c6d4447e6e361fae99
tree775921d7a6c854b7329015a5e473a2ff25657475
parentd951ca5439bb8726cfe1ceb2d12e220f29fe5125
[ValueTypes] Define MVTs for v128i2/v64i4 as well as i2 and i4.

Adds MVT::v128i2, MVT::v64i4, and implied MVT::i2, MVT::i4.

Keeps MVT::i2, MVT::i4 lowering actions as `expand`, which should be
removed once targets set this explicitly.

Adjusts 11 lit tests to reflect slightly different behavior during
DAG combine.

Differential Revision: https://reviews.llvm.org/D125247
18 files changed:
llvm/include/llvm/CodeGen/ValueTypes.td
llvm/include/llvm/Support/MachineValueType.h
llvm/lib/CodeGen/TargetLoweringBase.cpp
llvm/lib/CodeGen/ValueTypes.cpp
llvm/lib/IR/Function.cpp
llvm/test/CodeGen/AArch64/srem-seteq-illegal-types.ll
llvm/test/CodeGen/AMDGPU/srem-seteq-illegal-types.ll
llvm/test/CodeGen/ARM/srem-seteq-illegal-types.ll
llvm/test/CodeGen/Mips/srem-seteq-illegal-types.ll
llvm/test/CodeGen/PowerPC/srem-seteq-illegal-types.ll
llvm/test/CodeGen/RISCV/srem-seteq-illegal-types.ll
llvm/test/CodeGen/Thumb/srem-seteq-illegal-types.ll
llvm/test/CodeGen/Thumb2/srem-seteq-illegal-types.ll
llvm/test/CodeGen/X86/bitreverse.ll
llvm/test/CodeGen/X86/srem-seteq-illegal-types.ll
llvm/test/TableGen/intrinsic-pointer-to-any.td
llvm/utils/TableGen/CodeGenTarget.cpp
llvm/utils/TableGen/IntrinsicEmitter.cpp