dt-bindings: watchdog: sunxi: clarify clock support
authorAndre Przywara <andre.przywara@arm.com>
Thu, 17 Mar 2022 16:23:39 +0000 (16:23 +0000)
committerJernej Skrabec <jernej.skrabec@gmail.com>
Wed, 6 Apr 2022 20:25:26 +0000 (22:25 +0200)
commit42b91bb160815d82d36cc1cfe28f1edd9079d912
tree8c085670721a4e06cc0ce9aeb768b3665f1e744d
parent6d41e13041a306f85ad6cbeb3d532f35cc5cc90a
dt-bindings: watchdog: sunxi: clarify clock support

Most Allwinner SoCs have just one input clock to drive the watchdog
peripheral. So far this is the 24 MHz "HOSC" oscillator, divided down
internally to 32 KHz.
The F1C100 series watchdog however uses the unchanged 32 KHz "LOSC" as
its only clock input, which has the same effect, but let's the binding
description mismatch.

Change the binding description to name the clocks more loosely, so both
the LOSC and divided HOSC match the description. As the fixed clock names
now make less sense, drop them from SoCs supporting just one clock
input, they were not used by any DT anyway.

For the newer SoCs, supporting a choice of two input clocks, we keep
both the description and clock-names requirement.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Guenter Roeck <linux@roeck-us.net>
Reviewed-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com>
Link: https://lore.kernel.org/r/20220317162349.739636-3-andre.przywara@arm.com
Documentation/devicetree/bindings/watchdog/allwinner,sun4i-a10-wdt.yaml