[AArch64] Simplify isSeveralBitsExtractOpFromShr (NFC)
authorKazu Hirata <kazu@google.com>
Sat, 21 Jan 2023 17:23:39 +0000 (09:23 -0800)
committerKazu Hirata <kazu@google.com>
Sat, 21 Jan 2023 17:23:39 +0000 (09:23 -0800)
commit42afa168cdcca1d3307b1fe94534fffb269c1265
treeef9d177c601357f8ab628fcfc8e340a396eaf862
parentfb40c34b8f8c57f5eb55b085660e111832f27aca
[AArch64] Simplify isSeveralBitsExtractOpFromShr (NFC)

This patch simplifies isSeveralBitsExtractOpFromShr.

The following statements are equivalent:

  unsigned BitWide = 64 - countLeadingOnes(~(AndMask >> SrlImm));
  unsigned BitWide = 64 - countLeadingZeros(AndMask >> SrlImm);

Now, consider:

  if (BitWide && isMask_64(AndMask >> SrlImm)) {

When isMask_64 returns true, AndMask >> SrlImm and BitWide must be
nonzero.  Since BitWide does not contribute to narrowing the
condition, we can simplify the condition as:

  if (isMask_64(AndMask >> SrlImm)) {

We can negate the condition for an early exit as recommended by the
LLVM Coding Standards.

Now, all of the following are equivalent if AndMask >> SrlImm is
nonzero:

  MSB = BitWide + SrlImm - 1
  MSB = (64 - countLeadingZero(AndMask >> SrlImm)) + SrlImm - 1
  MSB = (63 - countLeadingZero(AndMask >> SrlImm)) + SrlImm
  MSB = 63 - countLeadingZero(AndMask)
  MSB = 63 ^ countLeadingZero(AndMask)
  MSB = findLastSet(AndMask, ZB_Undefined)
llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp