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(parent: fe9863a) | patch
MIPS: Loongson64: Set IPI_Enable register per core by itself
authorTiezhu Yang <yangtiezhu@loongson.cn>
Tue, 3 Nov 2020 07:12:02 +0000 (15:12 +0800)
committerThomas Bogendoerfer <tsbogend@alpha.franken.de>
Wed, 11 Nov 2020 22:52:26 +0000 (23:52 +0100)
commit42831cd70805211c240a5bba5b4fb6be9470c91d
tree618ac7d9c9fd4fca5730d8c9baeba1af642b708dtree | snapshot
parentfe9863a19a5a73af8227548603fb521050769611commit | diff
MIPS: Loongson64: Set IPI_Enable register per core by itself

In the current code, for example, core 1 sets Core[0, 1, 2, 3]_IPI_Enalbe
register and core 2, 3 do the same thing on the 1-way Loongson64 platform,
this is not necessary. Set IPI_Enable register per core by itself to avoid
duplicate operations and make the logic more clear.

Signed-off-by: Tiezhu Yang <yangtiezhu@loongson.cn>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
arch/mips/loongson64/smp.c diff | blob | history
Domain: System / Kernel;