[SelectionDAG][ARM][AArch64][Hexagon][RISCV][X86] Add SDNPCommutative to fma and...
authorCraig Topper <craig.topper@sifive.com>
Mon, 23 Nov 2020 18:01:52 +0000 (10:01 -0800)
committerCraig Topper <craig.topper@sifive.com>
Mon, 23 Nov 2020 18:09:20 +0000 (10:09 -0800)
commit4252f7773a5b98b825d17e5f77c7d349cb2fb7c7
tree4559286d47d506462f09856ce554962455d9b9e1
parente0e334a9c1ace7dd9339ca6cb5866ff7b7885e11
[SelectionDAG][ARM][AArch64][Hexagon][RISCV][X86] Add SDNPCommutative to fma and fmad nodes in tablegen. Remove explicit commuted patterns from targets.

X86 was already specially marking fma as commutable which allowed
tablegen to autogenerate commuted patterns. This moves it to the target
independent definition and fix up the targets to remove now
unneeded patterns.

Unfortunately, the tests change because the commuted version of
the patterns are generating operands in a different than the
explicit patterns.

Differential Revision: https://reviews.llvm.org/D91842
20 files changed:
llvm/include/llvm/Target/TargetSelectionDAG.td
llvm/lib/Target/AArch64/AArch64InstrInfo.td
llvm/lib/Target/ARM/ARMInstrMVE.td
llvm/lib/Target/ARM/ARMInstrVFP.td
llvm/lib/Target/Hexagon/HexagonPatterns.td
llvm/lib/Target/RISCV/RISCVInstrInfoD.td
llvm/lib/Target/RISCV/RISCVInstrInfoF.td
llvm/lib/Target/X86/X86InstrAVX512.td
llvm/lib/Target/X86/X86InstrFMA.td
llvm/lib/Target/X86/X86InstrFragmentsSIMD.td
llvm/test/CodeGen/AArch64/GlobalISel/select-with-no-legality-check.mir
llvm/test/CodeGen/AArch64/arm64-vmul.ll
llvm/test/CodeGen/ARM/GlobalISel/arm-instruction-select-combos.mir
llvm/test/CodeGen/ARM/GlobalISel/select-pr35926.mir
llvm/test/CodeGen/ARM/fp16-fusedMAC.ll
llvm/test/CodeGen/RISCV/double-arith.ll
llvm/test/CodeGen/RISCV/float-arith.ll
llvm/test/CodeGen/Thumb2/mve-float32regloops.ll
llvm/test/CodeGen/Thumb2/mve-fma-loops.ll
llvm/test/CodeGen/Thumb2/mve-intrinsics/ternary.ll