LoongArch: ptrace: Add hardware single step support
authorQing Zhang <zhangqing@loongson.cn>
Sat, 25 Feb 2023 07:52:57 +0000 (15:52 +0800)
committerHuacai Chen <chenhuacai@loongson.cn>
Sat, 25 Feb 2023 14:12:17 +0000 (22:12 +0800)
commit424421a7f34c1222d20a6c279f13b9caa71ecc83
tree5a758519364a4b1d2973ada95e98077bde4c6c33
parent356bd6f23682f11f7afe923d86c7f5f852b97fb2
LoongArch: ptrace: Add hardware single step support

Use the generic ptrace_resume code for PTRACE_SYSCALL, PTRACE_CONT,
PTRACE_KILL and PTRACE_SINGLESTEP handling. This implies defining
arch_has_single_step() and implementing the user_enable_single_step()
and user_disable_single_step() functions.

LoongArch cannot do hardware single-stepping per se, the hardware
single-stepping it is achieved by configuring the instruction fetch
watchpoints (FWPS) and specifies that the next instruction must trigger
the watch exception by setting the mask bit. In some scenarios
CSR.FWPS.Skip is used to ignore the next hit result, avoid endless
repeated triggering of the same watchpoint without canceling it.

Signed-off-by: Qing Zhang <zhangqing@loongson.cn>
Signed-off-by: Huacai Chen <chenhuacai@loongson.cn>
arch/loongarch/include/asm/inst.h
arch/loongarch/include/asm/loongarch.h
arch/loongarch/include/asm/processor.h
arch/loongarch/include/asm/ptrace.h
arch/loongarch/kernel/hw_breakpoint.c
arch/loongarch/kernel/ptrace.c
arch/loongarch/kernel/traps.c