arm64: cmpxchg: Use "K" instead of "L" for ll/sc immediate constraint
authorWill Deacon <will.deacon@arm.com>
Tue, 18 Sep 2018 08:39:55 +0000 (09:39 +0100)
committerWill Deacon <will.deacon@arm.com>
Fri, 7 Dec 2018 17:28:13 +0000 (17:28 +0000)
commit4230509978f2921182da4e9197964dccdbe463c3
tree4925537f68751d757aed38039f0418e6c7f5cc6a
parent959bf2fd03b59fc107584c21425f3dc73c49f762
arm64: cmpxchg: Use "K" instead of "L" for ll/sc immediate constraint

The "L" AArch64 machine constraint, which we use for the "old" value in
an LL/SC cmpxchg(), generates an immediate that is suitable for a 64-bit
logical instruction. However, for cmpxchg() operations on types smaller
than 64 bits, this constraint can result in an invalid instruction which
is correctly rejected by GAS, such as EOR W1, W1, #0xffffffff.

Whilst we could special-case the constraint based on the cmpxchg size,
it's far easier to change the constraint to "K" and put up with using
a register for large 64-bit immediates. For out-of-line LL/SC atomics,
this is all moot anyway.

Reported-by: Robin Murphy <robin.murphy@arm.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
arch/arm64/include/asm/atomic_ll_sc.h