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(parent: e0e6c96) | patch
pinctrl: rockchip: Add pinctrl support for rk3308
authorDavid Wu <david.wu@rock-chips.com>
Tue, 3 Dec 2019 11:26:50 +0000 (19:26 +0800)
committerKever Yang <kever.yang@rock-chips.com>
Thu, 5 Dec 2019 16:06:23 +0000 (00:06 +0800)
commit41eee945ce2a9a2a0955d30ee03b5653fdd04cbc
treef0a7130f9217ec8705ce9d116ac6fb705681500dtree | snapshot
parente0e6c96a671b43117554e7f6a1b9190e422ae460commit | diff
pinctrl: rockchip: Add pinctrl support for rk3308

An iomux register contains 8 pins, each of which is represented
by 2 bits, but the register offset is 0x8.

For example, GRF_GPIO0A_IOMUX offset is 0x0, but GRF_GPIO0B_IOMUX
offset is 0x8, the offset 0x4 is reserved.

So add a type IOMUX_8WIDTH_2BIT to calculate offset.

Signed-off-by: David Wu <david.wu@rock-chips.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
drivers/pinctrl/rockchip/Makefile diff | blob | history
drivers/pinctrl/rockchip/pinctrl-rk3308.c [new file with mode: 0644] blob
drivers/pinctrl/rockchip/pinctrl-rockchip-core.c diff | blob | history
drivers/pinctrl/rockchip/pinctrl-rockchip.h diff | blob | history
Domain: System / Kernel;