Add load-link, store-conditional paired EVA instructions
authorFaraz Shahbazker <fshahbazker@wavecomp.com>
Mon, 29 Apr 2019 01:21:00 +0000 (18:21 -0700)
committerFaraz Shahbazker <fshahbazker@wavecomp.com>
Mon, 6 May 2019 13:43:32 +0000 (06:43 -0700)
commit41cee0897b670168e0d6f455c9bc45c73f8023df
tree90f15ebdf438ae1956dc5a3d7eea35c64ae41a10
parentbe0d3bbbcdbdba83f74d8ad1be6c4c759255af0b
Add load-link, store-conditional paired EVA instructions

Add paired load-link and store-conditional instructions to the
EVA ASE for MIPS32R6[1].  These instructions are optional within
the EVA ASE.  Their presence is indicated by the XNP bit in the
Config5 register.

[1] "MIPS Architecture for Programmers Volume II-A: The MIPS32
     Instruction Set Manual", Imagination Technologies Ltd., Document
     Number: MD00086, Revision 6.06, December 15, 2016, Section 3.2
     "Alphabetical List of Instructions", pp. 230-231, pp. 357-360.

gas/
* config/tc-mips.c (mips_set_ase): Handle ASE_EVA_R6.
(macro) <M_LLWPE_AB, M_SCWPE_AB>: New cases.
(mips_after_parse_args): Translate EVA to EVA_R6.
* testsuite/gas/mips/ase-errors-1.s: Add new instructions.
* testsuite/gas/mips/eva.s: Likewise.
* testsuite/gas/mips/ase-errors-1.l: Check errors for
 new instructions.
* testsuite/gas/mips/mipsr6@eva.d: Check new test cases.

include/
* opcode/mips.h (ASE_EVA_R6): New macro.
(M_LLWPE_AB, M_SCWPE_AB): New enum values.

opcodes/
* mips-dis.c (mips_calculate_combination_ases): Add ISA
argument and set ASE_EVA_R6 appropriately.
(set_default_mips_dis_options): Pass ISA to above.
(parse_mips_dis_option): Likewise.
* mips-opc.c (EVAR6): New macro.
(mips_builtin_opcodes): Add llwpe, scwpe.

Derived from patch authored by Andrew Bennett <andrew.bennett@imgtec.com>
gas/ChangeLog
gas/config/tc-mips.c
gas/testsuite/gas/mips/ase-errors-1.l
gas/testsuite/gas/mips/ase-errors-1.s
gas/testsuite/gas/mips/eva.s
gas/testsuite/gas/mips/mipsr6@eva.d
include/ChangeLog
include/opcode/mips.h
opcodes/ChangeLog
opcodes/mips-dis.c
opcodes/mips-opc.c