projects / platform / upstream / llvm.git / commit
? search:
summary | shortlog | log | commit | commitdiff | tree
(parent: cdb06f2) | patch
[PowerPC] Eliminate compares - add i32 sext/zext handling for SETLT/SETGT
authorNemanja Ivanovic <nemanja.i.ibm@gmail.com>
Sat, 23 Sep 2017 04:41:34 +0000 (04:41 +0000)
committerNemanja Ivanovic <nemanja.i.ibm@gmail.com>
Sat, 23 Sep 2017 04:41:34 +0000 (04:41 +0000)
commit41c4a109d893604fe2570598ee62fceff6e1aee8
tree63fcc2e2836519f888c733c0de507bb062585d91tree | snapshot
parentcdb06f2150d0c75bf7ff13971fd40075568c0226commit | diff
[PowerPC] Eliminate compares - add i32 sext/zext handling for SETLT/SETGT

As mentioned in https://reviews.llvm.org/D33718, this simply adds another
pattern to the compare elimination sequence and is committed without a
differential revision.

llvm-svn: 314055
llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp diff | blob | history
llvm/test/CodeGen/PowerPC/memCmpUsedInZeroEqualityComparison.ll diff | blob | history
llvm/test/CodeGen/PowerPC/no-pref-jumps.ll diff | blob | history
llvm/test/CodeGen/PowerPC/testComparesigtsc.ll [new file with mode: 0644] blob
llvm/test/CodeGen/PowerPC/testComparesigtsi.ll [new file with mode: 0644] blob
llvm/test/CodeGen/PowerPC/testComparesigtss.ll [new file with mode: 0644] blob
llvm/test/CodeGen/PowerPC/testComparesiltsc.ll [new file with mode: 0644] blob
llvm/test/CodeGen/PowerPC/testComparesiltsi.ll [new file with mode: 0644] blob
llvm/test/CodeGen/PowerPC/testComparesiltss.ll [new file with mode: 0644] blob
Domain: System / Toolchain;